Technical Architecture

Pipeline Overview

1. Input RAW Bayer stream (AXI4-Stream)
2. Tile-based wavelet transform
3. Quantization engine
4. Parallel entropy encoders
5. AXI output to storage / PCIe

Scaling Model

Architecture supports multi-engine parallelization. Throughput scales linearly with instantiated wavelet cores.

Target Performance Class

• 8K60 real-time class
• 16K architecture-ready
• 4K high-frame-rate class (>1000 fps scalable)

Estimated Resource Class (XCZU7EV)

• Wavelet engine: high DSP utilization
• BRAM for line buffers
• Fully streaming – no full-frame DDR required